Binance Square
#dsh

dsh

180 views
3 Discussing
风中浪客
·
--
DeepSeek’s Agent (DSH) evaluation data contains a signal of a hardware roadmap. A few key numbers: - Token consumption is enormous, and KV cache hit rate is at the center of the discussion - For the same task, DSH takes 2× as long as GPT/Claude That “2×” is often treated only as a performance gap—but it’s an important clue to the hardware approach. What is the bottleneck in the Agent era? Not compute power—memory bandwidth. When agents do work = ultra-long context = massive KV cache repeatedly read and written. The longer the context, the larger the KV cache; the longer the reads— no matter how fast your compute chips are, the data can’t be moved fast enough from memory, and you end up waiting around. DSH’s doubled latency is, in essence, “the memory wall” calling it out: it achieves “lower cost” by relying on “slower memory access.” This also explains why Chen Liw u (Intel) insists on CPU + DRAM stacked packaging: NVIDIA’s solution is GPU + HBM stacked packaging (CoWoS technology), so the compute units sit right next to the memory; the data transfer distance shrinks from “centimeters” to “micrometers”—bandwidth surges. Chen L iw u is looking at the same thing, but on CPU: After the Agent becomes widespread, the CPU takes on a large amount of inference and scheduling; it still needs to run close to memory. Widespread adoption of agents will accelerate the arrival of the “CPU/GPU 1:1” era: - Now: data-center GPUs are the main characters, CPUs are supporting roles - In the Agent era: beside every GPU you’ll need a powerful CPU for processing, scheduling, the agent loop, and KV management - Then the CPU must be just like the GPU: CPU + HBM stacked packaging What does this mean (from an investment perspective): 1. Packaging technology = the next bottleneck choke point CoWoS, 2.5D/3D stacking, hybrid bonding—these packaging processes are the new battleground for AI hardware 2. Memory vendors will reset pricing HBM has already sold like crazy; if CPUs also need HBM, the upside for DRAM vendors expands another level 3. Intel’s “off-cycle bet” might pay off Everyone is watching NVIDIA, but Chen Liw u’s CPU + DRAM stacked packaging is betting on the Agent era’s “second curve.” One last line: Agent’s token bills are redefining hardware— when “read speed” is more valuable than “compute speed,” the chips that sit next to memory will be the winners. The first half of the compute arms race is the GPU, while the second half is packaging. #DeepSeek #DSH #封装 #HBM
DeepSeek’s Agent (DSH) evaluation data contains a signal of a hardware roadmap.

A few key numbers:
- Token consumption is enormous, and KV cache hit rate is at the center of the discussion
- For the same task, DSH takes 2× as long as GPT/Claude

That “2×” is often treated only as a performance gap—but it’s an important clue to the hardware approach.

What is the bottleneck in the Agent era?
Not compute power—memory bandwidth.
When agents do work = ultra-long context = massive KV cache repeatedly read and written.
The longer the context, the larger the KV cache; the longer the reads—
no matter how fast your compute chips are, the data can’t be moved fast enough from memory, and you end up waiting around.

DSH’s doubled latency is, in essence, “the memory wall” calling it out: it achieves “lower cost” by relying on “slower memory access.”

This also explains why Chen Liw u (Intel) insists on CPU + DRAM stacked packaging:

NVIDIA’s solution is GPU + HBM stacked packaging (CoWoS technology),
so the compute units sit right next to the memory; the data transfer distance shrinks from “centimeters” to “micrometers”—bandwidth surges.

Chen L iw u is looking at the same thing, but on CPU:
After the Agent becomes widespread, the CPU takes on a large amount of inference and scheduling; it still needs to run close to memory.

Widespread adoption of agents will accelerate the arrival of the “CPU/GPU 1:1” era:
- Now: data-center GPUs are the main characters, CPUs are supporting roles
- In the Agent era: beside every GPU you’ll need a powerful CPU for processing, scheduling, the agent loop, and KV management
- Then the CPU must be just like the GPU: CPU + HBM stacked packaging

What does this mean (from an investment perspective):

1. Packaging technology = the next bottleneck choke point
CoWoS, 2.5D/3D stacking, hybrid bonding—these packaging processes are the new battleground for AI hardware
2. Memory vendors will reset pricing
HBM has already sold like crazy; if CPUs also need HBM, the upside for DRAM vendors expands another level
3. Intel’s “off-cycle bet” might pay off
Everyone is watching NVIDIA, but Chen Liw u’s CPU + DRAM stacked packaging is betting on the Agent era’s “second curve.”

One last line:
Agent’s token bills are redefining hardware—
when “read speed” is more valuable than “compute speed,” the chips that sit next to memory will be the winners.

The first half of the compute arms race is the GPU,
while the second half is packaging.

#DeepSeek #DSH #封装 #HBM
AlphaQueen_01:
Spot on observation. The Agent era shifts the core constraint from pure FLOPs to memory bandwidth and HBM scaling. The memory wall is the true bottleneck."
Log in to explore more content
Join global crypto users on Binance Square
⚡️ Get latest and useful information about crypto.
💬 Trusted by the world’s largest crypto exchange.
👍 Discover real insights from verified creators.
Email / Phone number