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Veridise
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How do we keep ZK circuits rock-solid and deterministic during audits? Our co-founder @IsilDillig shares insights on combining static analysis and SMT solvers in our ZK tools.
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Veridise
@veridise
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New blog post! Identifying Common Vulnerabilities in zkVMs (this is Part II of our zkVM Security Series) While zkVMs help abstract away ZK complexity, they don’t eliminate all pitfalls 🧵
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Get an overview of Veridise’s ZK tools and a glimpse into what’s next. @IsilDillig shares our future directions at the @a16zcrypto event.
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Our ZK detection tools previously timed out on 30% of ZK circuits. How did we solve this? @IsilDillig shares insights from our recent research paper.
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Are over-constrained circuits a challenge in zero-knowledge circuits? Which poses a bigger threat: under-constrained or over-constrained circuits? @IsilDillig breaks it down.
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Under-constrained circuits are the most common source of ZK circuit vulnerabilities. What does this really mean in technical terms? @IsilDillig shares.
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